有机封装基板的芯片埋置技术研究进展

doi:10.16257/j.cnki.1681-1070.2024.0027

摘要/Abstract

摘要： 有机封装基板为IC提供支持、保护和电互联，是IC封装最关键的材料之一。系统级、微型化和低成本是IC封装的趋势，将有源、无源元件埋入封装基板，可以充分利用基板内部空间，释放更多表面空间，是减小系统封装体积的重要途径，因此有机封装基板的芯片埋置技术发展迅速。主要介绍有机封装基板的埋置技术发展过程，归纳了有机基板芯片埋置工艺路线类型，着重介绍了近十年不同的芯片埋置技术方案及其应用领域。在此基础上，对有机封装基板的埋置技术研究前景进行了展望。

关键词: 有机封装基板, 芯片埋置技术, 系统级封装, 异质集成

Abstract: Organic package substrates provide support, protection and electrical interconnection for ICs and are one of the most critical materials for IC packaging. System level, miniaturization and low cost are the trends of IC packaging. Embedding active and passive components into the package substrates allows for the efficient utilization of internal space of the substrates and the release of more surface space, which is an important approach to reduce the size of the package system. Therefore, the chip embedded technology for organic package substrates develops rapidly. The development process of chip embedded technology for organic package substrates is mainly introduced, the types of chip embedded process routes for organic package substrates are summarized, and different chip embedded technology solutions and their application fields in the last decade are highlighted. On this basis, the research prospects of the chip embedded technology for organic package substrates are prospected.

Key words: organic package substrate, chip embedded technology, system in package, heterogeneous integration

中图分类号:

TN305.94

杨昆,朱家昌,吉勇,李轶楠,李杨. 有机封装基板的芯片埋置技术研究进展[J]. 电子与封装, 2024, 24(2): 020102 .

YANG Kun, ZHU Jiachang, JI Yong, LI Yi’nan, LI Yang. Progress on Chip Embedded Technology for Organic Package Substrates[J]. Electronics & Packaging, 2024, 24(2): 020102 .

参考文献

[1] GUNAWAN F, LUO B, CAI J, et al.Study on two types of embedded components in substrate technology[J]. ECS Transactions, 2014, 60(1): 793-798.
[2] ALDERMAN A, BURGYAN L L, NARVESON B, et al. 3-D Embedded Packaging Technology: Analyzing its needs and challenges[J]. IEEE Power Electronics Magazine, 2015, 2(4): 30-39.
[3] HOEFFLINGER B. ITRS: international technology roadmap for semiconductors[J]. 2007.
[4] NARVESON B, PARKER E. Significant developments and trends in embedded substrate and component technologies for power applications[C]// 2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM), Raleigh, 2016: 1-18.
[5] LIU F H, SUNDARAM V, MIN S, et al. Chip-last embedded actives and passives in thin organic package for 1-110 GHz multi-band applications[C]// 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC), Las Vegas, 2010: 758-763.
[6] VASUDEVAN S, SHAIKH A. Microwave characterization of low temperature cofired ceramic system[C]// International Symposium on Advanced Packaging Materials, Santa Barbara, 1997: 152-157.
[7] 蔡积庆. 埋入电容和电感的 LTCC 低温烧结基板[J]. 印制电路信息, 2004(5):45-48.
[8] 严伟, 禹胜林, 房迅雷. 基于 LTCC 技术的三维集成微波组件[J]. 电子学报, 2005, 33(11): 2009-2012.
[9] SUKUMARAN V, BANDYOPADHYAY T, SUNDARAM V, et al. Low-cost thin glass interposers as a superior alternative to silicon and organic interposers for packaging of 3-D ICs[J]. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2012, 2(9): 1426-1433.
[10] UR REHMAN M, RAVICHANDRAN S, WATANABE A O, et al. Characterization of ABF/glass/ABF substrates for mmWave applications[J]. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2021, 11(3): 384-394.
[11] LETZ M, GOTSCHKE T, WAGNER F, et al. Structured glass substrates in wafer- and panel level packaging: status and recent achievements[J]. International Symposium on Microelectronics, 2021, 2021(1): 98-102.
[12] WATANABE A O, ALI M, ZHANG R, et al. Glass-based IC-embedded antenna-integrated packages for 28-GHz high-speed data communications[C]// 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), Orlando, 2020: 89-94.
[13] LI X C, JIA X F, KIM J W, et al. Die-embedded glass interposer with minimum warpage for 5G/6G applications[C]// 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC), Orlando, 2023: 2247-2254.
[14] PARKER E, NARVESON B, ALDERMAN A, et al. Embedding active and passive components in PCBs and inorganic substrates for power electronics[C]// 2015 IEEE International Workshop on Integrated Power Packaging (IWIPP), Chicago, 2015: 107-110.
[15] MAHAJAN R, NAIR R, WAKHARKAR V, et al. Emerging directions for packaging technologies[J]. Intel Technology Journal, 2002, 6(2): 62-75.
[16] BOETTCHER L, MANESSIS D, OSTMANN A, et al. Embedding of chips for system in package realization - technology and applications[C]// 2008 3rd International Microsystems, Packaging, Assembly & Circuits Technology Conference, Taipei, 2008: 383-386.
[17] SIEROSHTAN V, SEVSKIY G, KOMAKHA P, et al. Novel ultra-compact quad-band System-in-Package (SiP) module with IC embedded in substrate based on SESUB technology[J]. International Symposium on Microelectronics, 2012, 2012(1): 1131-1134.
[18] FlipChip International. FlipChip International and Fujikura Ltd. announce ChipletT?/ ChipsetT? ultra thin 3D packages[N/OL]. 2011-11.10. https://www.prnewswire.com/news-releases/flipchip-international-and-fujikura-ltd-announce-chiplett-chipsett-ultra-thin-3d-packages-133603918.html.
[19] ADAY J G, TESSIER T, ITOI K, et al. ChipsetT: embedded die substrate applications[J]. Additional Papers Presentations, 2013, 2013(DPC): 377-397.
[20] MACHIDA Y. Development of molded core embedded package (MCeP)[C]// JIEP EPADs Workshop, Tokyo, 2008: 62-73.
[21] TANAKA K, KURASHIMA N, IIZUKa H, et al. Thinner and miniaturization embedded device package, MCeP, for PoP and module application[C]// International Symposium on Microelectronics, International Microelectronics Assembly and Packaging Society, San Diego, 2012: 1010-1017.
[22] HU D C, TSENG T J, CHEN Y H, et al. An innovative embedded interposer carrier for high density interconnection[C]//2013 IEEE 63rd Electronic Components and Technology Conference, Las Vegas, 2013: 1332-1335.
[23] HU D C, HUNG Y P, CHEN YU HUA, et al. Embedded glass interposer for heterogeneous multi-chip integration[C]// 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), San Diego, 2015: 314-317.
[24] HU D C, LIN Y M, CHANG H H, et al. A TXV-less packaging platform for the era of IoTs[J]. International Symposium on Microelectronics, 2015, 2015(1):1-5.
[25] HU D C. Thin film RDL for nanochip package: US9263373[P]. 2016-02-16.
[26] HU D C. Electronic packaging solutions for artificial intelligence applications (invited talk)[C]// 2018 13th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), Taipei, 2018: 127-129.
[27] SHIMIZU N, KANEDA W, ARISAKA H, et al. Development of organic multi chip package for high performance application[C]// International Symposium on Microelectronics, International Microelectronics Assembly and Packaging Society, Orlando, 2013: 414-419.
[28] KYOZUKA M, YOSHIDA T, SHIMIZU N, et al. The die embedded and RDL structure on the high density substrate (i-THOP?) for mobile application[C]// International Symposium on Microelectronics, International Microelectronics Assembly and Packaging Society, Pasadena, 2016: 1-6.
[29] MAHAJAN R, SANE S. Microelectronic package containing silicon patches for high density interconnects, and method of manufacturing same: US8064224[P]. 2011-11-22.
[30] BRAUNISCH H, ALEKSOV A, LOTZ S, et al. High-speed performance of silicon bridge die-to-die interconnects[C]// 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems, San Jose, 2011: 95-98.
[31] MAHAJAN R, SANKMAN R, PATEL N, et al. Embedded multi-die interconnect bridge (EMIB): a high density, high bandwidth packaging interconnect[C]// 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), Las Vegas, 2016: 557-565.
[32] VISWANATH R, CHANDRASEKHAR A, SRINIVASAN S, et al. Heterogeneous SoC integration with EMIB[C]// 2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Chandigarh, 2018: 1-3.
[33] LIN J, CHUNG C K, LIN C F, et al. Scalable chiplet package using fan-out embedded bridge[C]// 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), Orlando, 2020: 14-18.
[34] LIU S L B, KAO N, SHIH T, et al. Fan-out embedded bridge solution in HPC application[C]// 2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC), Singapore, 2021: 222-225.
[35] QIU Y, BEILLIARD Y, DE SOUSA I, et al. A self-aligned structure based on V-groove for accurate silicon bridge placement[C]// 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), San Diego, 2022: 668-673.
[36] YANG H S, ZHANG C Q, ZIA M, et al. Interposer-to-interposer electrical and silicon photonic interconnection platform using silicon bridge[C]// 2014 Optical Interconnects Conference, San Diego, 2014: 71-72.
[37] MAHAJAN R, QIAN Z G, VISWANATH R S, et al. Embedded multidie interconnect bridge—a localized, high-density multichip packaging interconnect[J]. IEEE Transactions on Components, Packaging and Manufacturing Technology, 2019, 9(10): 1952-1962.
[38] DUAN G, KANAOKA Y, MCREE R, et al. Die embedding challenges for EMIB advanced packaging technology[C]// 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), San Diego, 2021: 1-7.
[39] SIKKA K K, CASEY J A, RUBIN J, et al. Direct bonded heterogeneous integration packaging structures: US11177217[P]. 2021-11-16.
[40] MATSUMOTO K, BERGENDAHL M, SIKKA K, et al. Thermal analysis of DBHi (direct bonded heterogeneous integration) Si bridge[C]// 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), San Diego, 2021: 1382-1390.
[41] SIKKA K, BONAM R, LIU Y, et al. Direct bonded heterogeneous integration (DBHi) Si bridge[C]// 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), San Diego, 2021: 136-147.
[42] TOWLE S N, BRAUNISCH H, HU C, et al. Bumpless build-up layer packaging[C]//Proceedings of ASME 2001 International Mechanical Engineering Congress and Exposition, New York, 2021: 25-31.
[43] KO C T, CHEN S, CHIANG C W, et al. Embedded active device packaging technology for next-generation chip-in-substrate package, CiSP[C]// 56th Electronic Components and Technology Conference, San Diego, 2006: 322-329.
[44] LEE D, KIM S, KIM M, et al. Fabrication of die embedded substrate and mechanical stress evaluation at active area of the embedded die[C]// 2008 10th Electronics Packaging Technology Conference, Singapore, 2008: 224-229.
[45] SCHWEIZER. p2 pack embedding[EB/OL]. [2023-12-28] https://schweizer.ag/en/technologies-solutions/pcb-technologies/semiconductor-embedding-systems/p2-pack.

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