中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2020, Vol. 20 ›› Issue (1): 010204 . doi: 10.16257/j.cnki.1681-1070.2020.0110

• 电路设计 • 上一篇    下一篇

一种用于1000BASE-X物理层的8B/10B编码器设计

朱佳,万书芹,陆锋   

  1. 1. 江南大学,江苏 无锡 214122;2. 中科芯集成电路有限公司,江苏 无锡 214072
  • 收稿日期:2019-10-10 出版日期:2020-01-15 发布日期:2020-01-15
  • 作者简介:朱 佳(1994—),男,江苏盐城人,硕士研究生在读,研究方向为数字集成电路设计。

Design of 8B/10B Encoder Used for 1000BASE-X Physical Layer

ZHU Jia, WAN Shuqin, LU Feng   

  1. 1. Jiangnan University, Wuxi 214072, China; 2. China Key System & Integrated Circuit Co., Ltd., Wuxi 214072, China
  • Received:2019-10-10 Online:2020-01-15 Published:2020-01-15

摘要: 介绍了1000BASE-X物理编码层和物理层系统的设计,为了解决高速光纤传输过程中基线漂移和码流不平衡的问题,1000BASE-X物理编码层采用8B/10B编码算法。基于8B/10B编码规则和8B/10B编码内在相关性的分析研究,设计了一种查表法和组合逻辑法相结合的8B/10B编码器,通过硬件语言Verilog HDL实现了编码算法,并在QuartusII和Modelsim上进行综合和功能仿真验证,仿真结果表明该方法的逻辑资源面积占用小、编码速度快、可靠性高。

关键词: 1000BASE-X, 物理编码层, 物理层系统, 8B/10B编码算法

Abstract: The design of 1000BASE-X physical coding layer and physical layer system is introduced. In order to solve the problem of baseline drift and code stream imbalance during high-speed fiber transmission, 1000BASE-X physical coding layer adopts 8B/10B coding algorithm. For the analysis of 8B/10B coding rules and 8B/10B coding intrinsic correlation, an 8B/10B encoder combining table lookup method and combinatorial logic method is designed. The encoding algorithm is implemented by hardware language Verilog HDL, the simulation and functional simulations are carried out on Modelsim and QuartusII. The results show that the method has small logic resource area, fast coding speed and high reliability.

Key words: 1000BASE-X, physical coding layer, physical layer system, 8B/10B encoding algorithm

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