中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2025, Vol. 25 ›› Issue (12): 120202 . doi: 10.16257/j.cnki.1681-1070.2025.0134

• 封装、组装与测试 • 上一篇    下一篇

系统级封装模组高可靠封焊技术研究

成嘉恩,姬峰,张鹏哲,兰元飞,何钦江,兰梦伟,王明伟   

  1. 北京遥感设备研究所,北京  100854
  • 收稿日期:2025-02-24 出版日期:2025-12-26 发布日期:2025-04-30
  • 作者简介:成嘉恩(1994—),男,内蒙古呼和浩特人,博士,工程师,现从事集成电路封装工艺设计工作。

Research on High-Reliability Soldering Technology for System-in-Package Modules

CHENG Jiaen, JI Feng, ZHANG Pengzhe, LAN Yuanfei, HE Qinjiang, LAN Mengwei, WANG Mingwei   

  1. Beijing Institute of Remote Sensing Equipment, Beijing 100854, China
  • Received:2025-02-24 Online:2025-12-26 Published:2025-04-30

摘要: 随着射频组件的工作频段不断提高、装配空间不断压缩,传统基于二维多芯片组件工艺的射频组件已无法满足产品高性能、小型化、轻量化的需求。系统级封装工艺将三维芯片叠层结构封装至具有高布线密度的金属陶瓷管壳结构中,通过焊锡球实现垂直方向的低损耗射频互连,能够极大提高产品集成度与性能。从封焊过程中的工装设计、焊料设计以及焊接参数设计等多个维度开展研究,探究最优工艺路线,最终实现了密封漏率≤ 3×10-9 Pa·m3/s、焊接层空洞率≤ 5%的封焊工艺指标,实现了模组整体高可靠工作。

关键词: 系统级封装模组, 金锡焊料, 对准精度, 空洞率

Abstract: As the operating frequency of RF components continues to improve and the assembly space continues to be compressed, the traditional RF components based on the two-dimensional multi-chip assembly process can no longer meet the demands for high-performance, miniaturization and lightweight products. The system-in-package process encapsulates the 3D chip stack structure into a metal-ceramic shell structure with high wiring density, and realizes vertical low-loss RF interconnections by soldering balls, which can greatly improve the integration and performance of the product. The research is carried out from the dimensions of tooling design, solder design and welding parameter design in the sealed welding process, to explore the optimal process route. The sealed welding process indexes of sealing leakage rate ≤ 3×10-9 Pa·m3/s and the void rate of the welding layer ≤ 5% are finally realized, and the overall high reliability of the module is realized.

Key words: system-in-package module, gold-tin solder, alignment accuracy, void rate

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