中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2021, Vol. 21 ›› Issue (11): 110301 . doi: 10.16257/j.cnki.1681-1070.2021.1104

• 电路设计 • 上一篇    下一篇

一种高效率可重构的CPU验证平台

刘春锐;张宏奎;黄旭东;陈振娇   

  1. 中科芯集成电路有限公司,江苏 无锡 214072
  • 收稿日期:2021-02-26 出版日期:2021-11-24 发布日期:2021-05-11
  • 作者简介:刘春锐(1991—),女,内蒙古巴彦淖尔人,硕士,工程师,现从事CPU芯片的设计与验证工作。

A Highly Efficient and Reconfigurable CPUVerification Platform

LIU Chunrui, ZHANG Hongkui, HUANG Xudong, CHEN Zhenjiao   

  1. China Key System & Integrated Co., Ltd., Wuxi 214072, China
  • Received:2021-02-26 Online:2021-11-24 Published:2021-05-11

摘要: 现有的CPU验证平台大多基于指令码匹配技术搭建,这种方式开发周期长、调试难度高。在CPU芯片的设计中,高效和完备的功能验证已成为CPU可靠性的重要依据。针对某32位CPU芯片的验证需求,提出了一种高效率可重构的CPU验证平台,并完成了该验证平台的设计与实现。该验证平台充分利用SystemVerilog的字符串匹配技术,集成了验证用例生成组件、参考模型组件、监控组件和结果比较组件,使用脚本语言自动化完成批量验证。相比现有CPU验证平台,该平台开发及调试周期短,模块化的结构易于重用和移植。目前该平台已完成代码覆盖率收集,成功验证了自主设计的CPU功能正确性。

关键词: CPU, 验证平台, 功能验证, SystemVerilog

Abstract: Existing CPU verification platforms are mostly based on instruction code matching technology to build verification platforms. This method has a long development cycle and high debugging difficulty. In the design of CPU chips, efficient and complete functional verification has become an important basis for CPU reliability. Aiming at the verification requirements of a 32-bit CPU chip, a highly efficient and reconfigurable CPU verification platform is proposed, and the design and implementation of the verification platform are completed. The verification platform makes full use of SystemVerilog's string matching technology, integrates verification testcase generation components, reference model components, monitoring components and result comparison components, and uses scripting language to automatically complete batch verification. Compared with the existing CPU verification platform, the development and debugging time of this platform is short, and the modular structure is easy to reuse and transplant. At present, the platform has completed the collection of code coverage and successfully verified the functional correctness of the independently designed CPU.

Key words: CPU, verificationplatform, functionalverification, SystemVerilog

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