中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2025, Vol. 25 ›› Issue (1): 010204 . doi: 10.16257/j.cnki.1681-1070.2025.0010

• 封装、组装与测试 • 上一篇    下一篇

面向高密度数字SiP应用的封装工艺研究

柴昭尔1,3,卢会湘1,2,3,徐亚新1,3,李攀峰3,4,王杰1,3,田玉3,4,王康1,3,韩威1,3,尹学全1,3   

  1. 1. 中国电子科技集团公司第五十四研究所,石家庄?050081;2. 中华通信系统有限责任公司河北分公司,石家庄? 050200;3. 通信软件与专用集成电路设计国家工程研究中心,石家庄?050081;4. 石家庄诺通人力资源有限公司,石家庄? 050035
  • 收稿日期:2024-09-23 出版日期:2025-01-22 发布日期:2025-01-08
  • 作者简介:柴昭尔(1993—),女,山西运城人,博士,工程师,主要研究方向为先进封装技术。

Research on the Packaging Process of High-Density Digital SiP Applications

CHAI Zhao’er1,3, LU Huixiang1,2,3, XU Yaxin1,3, LI Panfeng3,4, WANG Jie1,3, TIAN Yu3,4, WANG Kang1,3, HAN Wei1,3, YIN Xuequan1,3   

  1. 1. China Electronics Technology Group CorporationNo.54Research Institute, Shijiazhuang 050081, China; 2. Hebei Branch of China CommunicationSystem Co., Ltd., Shijiazhuang 050200, China; 3. National Engineering Research Center of Communication Software and AsicDesign, Shijiazhuang 050081, China; 4. Shijiazhuang Nuotong Human Resources Co., Ltd., Shijiazhuang 050035,China
  • Received:2024-09-23 Online:2025-01-22 Published:2025-01-08

摘要: 面向高密度数字系统级封装(SiP)应用,采用多芯片一体化封装技术,在系统内部集成了数字信号处理器(DSP)以及外围的DDR3、SPI Flash、Nor Flash、Nand Flash、低压差稳压器(LDO)等多颗芯片,并基于高密度陶瓷封装基板及表面多层薄膜工艺实现了各芯片之间的高速互连。此外,利用无硅通孔转接板工艺完成了DDR芯片从引线键合到倒装的封装形式的重构,在保证传输距离的同时也保证了芯片封装尺寸的最小化。在35 mm×40 mm的封装尺寸内实现了一个具备数字信号处理功能的最小系统。所涉及到的技术为通用基础技术,可广泛应用于其他高密度封装产品中。

关键词: 陶瓷基板, 多层薄膜, 封装重构

Abstract: For high-density digital system in packaging (SiP) applications, adopting the multi-chip integrated packaging technology, and the digital signal processor (DSP) and peripheral DDR3, SPI Flash, Nor Flash, Nand Flash, and low-dropout linear regulator (LDO) chips are integrated in the system, and the high speed interconnection between the chips is realized based on the high-density ceramic packaging substrate and the surface multi-layer thin film process. In addition, the reconfiguration of the DDR chip from wire bonding to flip chip packaging has been completed by using the non-silicon through via interposer technology, which ensures the transmission distance while minimizing the chip packaging size. A minimal system with digital signal processing functions is realized within a packaging size of 35 mm × 40 mm. The technologies involved are general basic technologies that can be widely used in other high-density packaging products.

Key words: ceramic substrate, multi-layer thin film, packaging reconfiguration

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