关键词: CMOS工艺, 半导体器件, TCAD仿真

Abstract: Based on the micro-level CMOS standard process verified by the micro-nano scientific research platform, the effects of field implantation, channel adjustment implantation, substrate bias voltage and metal type on the performance of MOSFET devices are simulated by TCAD, and then the key processes of the device in the CMOS process are optimized and designed to provide guidance for the micro-nano process chip of the scientific research platform.The simulation results show that the threshold voltage of PMOS is significantly affected when the N+ field implantation energy is greater than 60 keV, and the NMOS threshold voltage is significantly affected when the P+ field implantation energy is 30-50 keV; the dose of PMOS channel adjustment shall not exceed 2.1×10¹² cm^-2, as it affects current switching ratio and subthreshold swing of the device;the local oxidation of silicon (LOCOS) isolation characteristics are optimized at a field injection dose of 10¹³ cm^-2, when the breakdown voltage of LOCOS is 32.5 V; when the thickness of titanium interlayer is 120 nm, the order of magnitude of contact resistance between aluminum and substrate can be reduced from 10² to 10¹.

Key words: CMOS process, semiconductor device, TCAD simulation