关键词: 串行解串器, 通用异步收发器, 环回功能, 误码率, 内建自测试

Abstract: An efficient high-speed serial deserialiser (SerDes) debugging method based on universal asynchronous transceiver (UART) is proposed. Due to the limited number of pins in the packaging process of SerDes, it is difficult to pin out all the test points of the physical layer (PHY) as the pins of the test chip. To solve this problem, the UART module is introduced as the conversion module for PHY communication with the outside world. A test plan is formulated for the SerDes IP to be tested, which cascades the UART and other modules with the IP to be tested, and transfers the configuration parameters required for SerDes debugging to PHY's control register through the UART module, so as to complete the reading and writing operations of PHY's internal registers under the control of the control register. In the operating mode of 1.25 Gbit/s and 20 bit, the testing of SerDes bit error rate is completed, and dynamic debugging of SerDes chip parameters is realized, which greatly reduce the testing complexity and time.

Key words: serial deserialiser, universal asynchronous receiver, loopback function, bit error rate, built-in self-test