关键词: 单粒子翻转, 汉明码, 检错纠错, 校验码, 独立存储

Abstract: The error detection and correction mechanism by introducing check codes can effectively enhance the memory's ability to resist single-event upset. However, in traditional architectures, the check code and data code are stored in the same unit, which poses a potential risk of high-energy particles simultaneously triggering the flipping of both. A check code independent storage architecture based on SRAM is proposed to address this issue, using dedicated memory units to manage the check code. The simulation results show that the design can effectively correct 1-bit errors and detect 2-bit errors; in terms of performance, there are no significant increases in area and power consumption, and the single-event upset rate of fault injection simulation decreases from 3.96% to 0.00%.

Key words: single-event upset, Hamming code, error detection and correction, check code, independent storage