关键词: CEC协议, 串行通信, 有限状态机

Abstract: An ASIC design scheme of consumer electronic controller (CEC) is proposed based on fully understanding the HDMI-CEC v1.4 Specification. After analyzing the waveform in the serial port, two special purposes finite-state machines (FSMs) are designed to manage two major aspects of this specification: Bit timing and message flow structure. The IP core of CEC is completed by exploiting synthesizable Verilog language. The functional simulation is realized by using NC-Verilog simulation tools. FPGA development board is also used for verification purpose. These results indicate that this design meets all the requirements of HDMICEC specification. It may apply broadly in the development of embedded SoC system that supports HDMI port.

Key words: CEC protocol, serial communication, FSM