中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

导航

电子与封装 ›› 2020, Vol. 20 ›› Issue (7): 070304 . doi: 10.16257/j.cnki.1681-1070.2020.0705

• 电路设计 • 上一篇    下一篇

一种基于比较器亚稳态进行电容失配校准的全差分12位SAR ADC

曹文臻1,唐鹤1,2   

  1. 1.电子科技大学,成都 610054;2.电子科技大学广东电子信息工程研究院,广东东莞 523808
  • 接受日期:2020-03-10 发布日期:2020-03-23
  • 作者简介:曹文臻(1995—),男,河南商丘人,硕士研究生,主要从事逐次逼近型数模转换器的研究。

A 12-bit Fully Differential SAR ADC with Capacitor Mismatch Calibration Based on Comparator Metastability

CAO Wenzhen1, TANG He1,2   

  1. 1.University of Electronic Science and Technology of China, Chengdu610054, China; 2.Institute of Electronic and Information Engineering of UESTC in Guangdong, Dongguan523808,China
  • Accepted:2020-03-10 Published:2020-03-23

摘要: 介绍了一种具有新型电容失配校准算法的12位全差分逐次逼近型模数转换器(SAR ADC)。该校准算法基于比较器的亚稳态实现,同时利用了统计的方法来计算电容的失配量。此外,为了提高亚稳态检测精度并避免“假亚稳态”的问题,在该ADC中使用了一种新的亚稳态检测电路,进一步提高了校准精度并优化了时序控制序列。该SAR ADC采用40 nm CMOS工艺实现验证。后仿真结果显示,与不带校准的相比,该算法可以使ADC的有效位数提高1.52 bits,在130 MSample/s的采样率下达到了11.71 bit。该 ADC的总功率为9.27 mW,面积为0.131 mm2,品质因数(FoM)为17.4 fJ /step。

关键词: 逐次逼近型数模转换器, 电容失配校准, 亚稳态检测

Abstract: This paper presents a fully differential 12-bit SAR ADC with a novel capacitor mismatch calibration. The calibration calculates the capacitor mismatch via the metastability of the comparator and statistical method. In order to increase the detection accuracy and avoid “fake metastability” problem, we design a novel metastability detection circuit to overcome this problem and improve both calibration accuracy and the timing control sequences. The SAR ADC is implemented in a 40 nm CMOS process. The post-simulation shows that the ENOB has been improved by 1.52 bits to achieve 11.71 bits at 130 MSample/s sampling rate using our proposed calibration compared to that w/o calibration. The ADC’s total power is 9.27 mW with an area of 0.131 mm2, and the figure of merit (FoM) reaches to 17.4 fJ/step.

Key words: SAR ADC, capacitor mismatch calibration, metastability detection

中图分类号: