中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2018, Vol. 18 ›› Issue (11): 30 -35. doi: 10.16257/j.cnki.1681-1070.2018.0124

• 电路设计 • 上一篇    下一篇

CRC校验在SPI接口设计中的实现

强小燕,史兴强,刘梦影   

  1. 中科芯集成电路股份有限公司,江苏无锡 214072
  • 收稿日期:2018-07-14 出版日期:2018-11-20 发布日期:2018-11-20
  • 作者简介:强小燕(1978—),女,江苏无锡人,本科学历,2001年毕业东南大学微电子专业,工程师,现从事IC设计工作。

Implementation of CRC in SPI Design

QIANG Xiaoyan,SHI Xingqiang,LIU Mengying   

  1. China Key System Co,Ltd,Wuxi 214072,China
  • Received:2018-07-14 Online:2018-11-20 Published:2018-11-20

摘要: 串行外设接口(SPI,serial peripheral interface)以其高速的传输性能和灵活简单的配置,广泛应用于扩展外设及其数据交换。由于串行通信传输的不确定性以及干扰等原因,通信经常会出现异常情况。为提高SPI通信传输的可靠性,在SPI接口设计中增加循环冗余校验(CRC,cyclic Redundancy Check)功能。运用硬件描述语言Verilog HDL设计并实现了具有CRC校验功能的SPI接口。仿真结果表明,该SPI接口不仅可以高速高效地工作于多种工作模式,且CRC校验功能能够保证通信传输的可靠性。

关键词: CRC, 串行, SPI, 可靠性

Abstract: SPI features high-speed transfer and flexible configuration performances,which results in its widely use in expanding exterior devices and data communication.Owing to the uncertainty of communication,abnormal conditions often occur.In order to enhance reliability of SPI communication,this proposed SPI is combined with CRC algorithm and implemented by applying Verilog HDL.Simulation results indicate that the designed SPI is able to not only operate in variety of communication modes,but also guarantee the reliability of communication.

Key words: CRC, 串行, SPI, 可靠性

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