用于电荷域ADC的大摆幅电荷传输电路设计

doi:10.16257/j.cnki.1681-1070.2022.0614

电子与封装 ›› 2022, Vol. 22 ›› Issue (6): 060305 . doi: 10.16257/j.cnki.1681-1070.2022.0614

用于电荷域ADC的大摆幅电荷传输电路设计

庞立鹏;潘福跃;苏小波

中科芯集成电路有限公司，江苏无锡 214072

收稿日期:2021-07-13 出版日期:2022-06-23 发布日期:2022-06-23
作者简介:庞立鹏（1988—），男，江苏响水人，本科，工程师，现从事科研项目技术与管理工作。

Design of a Large-Swing ChargeTransfer Circuit for Charge-Domain Analog-to-Digital Converter

PANG Lipeng, PAN Fuyue, SU Xiaobo

China Key System & Integrated Circuit Co., Ltd., Wuxi 214072, China

Received:2021-07-13 Online:2022-06-23 Published:2022-06-23

摘要/Abstract

摘要： 提出了一种用于高速电荷域流水线模数转换器（Analog-to-Digital Converter，ADC）中的高精度大摆幅电荷传输电路，采用栅压自举技术，克服了现有电荷传输电路中信号摆幅受限的问题。基于该技术，采用0.18 μm CMOS工艺，设计并实现了一款14位200 MSample/s电荷域流水线ADC。在189.9 MHz信号输入和全采样率条件下，信噪比为61.7 dBFS，无杂散动态范围为72.6 dBc；在1.8 V供电下，ADC整体功耗仅为102 mW。

关键词: 电荷域模数转换器, 电荷传输电路, 栅压自举技术, 信号摆幅

Abstract: A high-precision large-swing charge transfer circuit for high-speed charge-domain pipelined analog-to-digital converter (ADC) is proposed. The bootstrapped technology is adopted to overcome the limitation of the signal-swing in the existing charge transfer circuit. With the proposed charge transfer circuit，a 14-bit 200 MSample/s charge-domain pipelined ADC is designed and implemented in 0.18 μm CMOS process. The implemented ADC achieves 61.7 dBFS signal to noise ratio and 72.6 dBc spurious free dynamic range for a 189.9 MHz input signal at full sampling rate. It consumes a total power of 102 mW from a 1.8 V supply.

Key words: charge-domainanalog-to-digitalconverter, chargetransfercircuit, gatevoltagebootstraptechnology, signalswing

中图分类号:

TN47

庞立鹏;潘福跃;苏小波. 用于电荷域ADC的大摆幅电荷传输电路设计[J]. 电子与封装, 2022, 22(6): 060305 .

PANG Lipeng, PAN Fuyue, SU Xiaobo. Design of a Large-Swing ChargeTransfer Circuit for Charge-Domain Analog-to-Digital Converter[J]. Electronics & Packaging, 2022, 22(6): 060305 .

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用于电荷域ADC的大摆幅电荷传输电路设计

Design of a Large-Swing ChargeTransfer Circuit for Charge-Domain Analog-to-Digital Converter

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