中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2022, Vol. 22 ›› Issue (10): 100304 . doi: 10.16257/j.cnki.1681-1070.2022.1009

• 电路与系统 • 上一篇    下一篇

用于网络处理芯片的片上电源产生电路设计

闫振林;温芝权;张兵;靳新波;史顺达   

  1. 苏州雄立科技有限公司,江苏 苏州 215000
  • 收稿日期:2022-02-15 出版日期:2022-10-26 发布日期:2022-05-11
  • 作者简介:闫振林(1984—),男,江苏南京人,硕士,高级系统工程师,主要研究方向为以太网相关芯片的研发。

Design of on-Chip Power Generation Circuit for Networking Processing Chip

YAN Zhenlin, WEN Zhiquan, ZHANG Bing, JIN Xinbo, SHI Shunda   

  1. XEL Technology, Inc., Suzhou 215000, China
  • Received:2022-02-15 Online:2022-10-26 Published:2022-05-11

摘要: 设计了一种用于网络处理芯片的片上电源产生电路,它包括高精度带隙基准电路、缓冲驱动电路、4个快速响应低压差线性稳压器(LDO)电路和异常检测电路。该电路通过4个LDO分别给存储器、搜索引擎算法内核、时钟管理和控制逻辑独立供电,提高了细分功能模块的电源稳定性。异常检测电路在电路异常时产生错误信号,快速关断电源,提高整体芯片供电可靠性。电路采用28 nm工艺实现。测试结果表明,该电路提供的最大负载电流达200 mA,满足网络芯片系统需求。

关键词: 路由查找, LDO, 电源产生, 电压检测

Abstract: An on-chip power generation circuit for a network processing chip is designed. It includes a high-precision bandgap reference circuit, a buffer driver circuit, 4 fast response low dropout regulator (LDO) circuits and an abnormal detection circuit. It powers the memory, search engine algorithm core, clock management and control logic independently by 4 LDOs, which improves the stability of power for each circuit module. When the circuit is abnormal, an error signal is generated by the abnormal detection circuit to quickly turn off the power and improve the power reliability of the whole chip. The circuit is realized by 28 nm process. The test results show that the maximum load current provided by the circuit is up to 200 mA, which meets the requirements of network chip systems.

Key words: routing lookup, LDO, power generation, voltage detection

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