中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装

• 封装、组装与测试 •    下一篇

光随机源安全芯片封装键合参数优化方法研究

王祥,李建强,王晓晨,马玉松,薛兵兵,周斌,于政强   

  1. 北京智芯微电子科技有限公司 安全技术事业部,北京  100080
  • 收稿日期:2025-08-18 修回日期:2025-09-05 出版日期:2025-09-22 发布日期:2025-09-22
  • 通讯作者: 李建强
  • 基金资助:
    北京智芯微电子技术研发项目(549656230001)

Research on The Optimization Method of Bonding Wire Parameters of Optical Random Source security chip Packaging

Wang Xiang, Li Jianqiang, Wang Xiaochen, Ma Yusong, Xue Bingbing, Zhou Bin, Yu Zhengqiang   

  1. Beijing Smartchip Microelectronics Technology Co., Ltd, Security Technology Business unit, Beijing 100080, China
  • Received:2025-08-18 Revised:2025-09-05 Online:2025-09-22 Published:2025-09-22

摘要: 光随机源安全芯片器件封装内部的芯片和基板之间通过键合线连接,以实现电子信号在封装内部和外部之间的高效传输。由于其特殊的功能需求,需要保证封装内部可供光线传播,因此在封装内部使用透明的覆晶胶代替了传统的塑封料。但是在工作条件下,覆晶胶的热膨胀系数远大于传统塑封料,封装内材料的热不匹配使得键合线上的产生较大应力,引发键合线剥离和断裂,并最终导致器件失效。为了确保光随机源安全芯片器件在工作状态中的稳定可靠,需要对其封装结构进行优化,减小键合线上的应力。本文首先研究了覆晶胶高度对键合线应力的影响;然后以键合线高度、键合线直径和键合线弧度为研究变量,以键合线最小应力为优化目标,基于有限元模拟进行三因素三水平正交试验。通过极差分析对影响键合线上应力的主要因素进行排序。结果表明,键合线弧度、键合线高度和键合线直径均会对键合线应力产生较大影响。

关键词: 光量子安全芯片, 键合线, 正交试验, 结构优化

Abstract:

Optical Random Source security chip device packages are connected between the chip and substrate inside the package by bonding wires to achieve efficient transmission of electronic signals between the inside and outside of the package. Due to its special functional requirements, it is necessary to ensure that the interior of the package is suitable for light transmission. Therefore, transparent filling compound is used inside the package instead of the traditional plastic molding material. However, under operating conditions, the coefficient of thermal expansion of the filling compound is much larger than that of traditional plastic molding materials. The thermal mismatch of the materials inside the package causes large stresses on the bonding wires, which lead to bonding wire stripping and fracture, and ultimately to device failure. In order to ensure the stability and reliability of the optical random source security chip device in the working condition, it is necessary to optimize the package structure of the optical random source security chip to reduce the stress on the bonding wire. In this paper, the effect of the height of the overlay adhesive on the stress on the bonding wire is firstly investigated; then three-factor, three-level orthogonal tests are conducted based on finite element simulation with the height of the bonding wire, the diameter of the bonding wire and the curvature of

the bonding wire as the variables of the study, and with the minimum stress on the bonding wire as the optimization objective. The main factors affecting the stress on the bonding wire were ranked by means of polar analysis. The results show that the bonding wire radius, bonding wire height and bonding wire diameter all have a large influence on the bonding wire stress.

Key words: quantum optical security chip, bonding wire, orthogonal test, structure optimization