关键词: 稳压器, 低功耗, 输出过冲, 启动电路

Abstract: Based on a 0.18 μm BCD process, a low-power low-dropout linear regulator (LDO) circuit was designed and implemented. To address the significant output voltage overshoot issue during rapid power-on after shutdown, an optimization method is proposed. On the basis of the LDO input-stage structure, a startup circuit module is added to generate a startup signal. When the chip powers on, the startup circuit produces a high-level pulse signal, turning on the startup transistor. This increases the tail current of the operational amplifier, thereby enhancing its response speed and reducing output overshoot. Experimental results show that this method reduces the output overshoot from 3.406 V to 0.297 V, effectively mitigating the output voltage overshoot and significantly improving the transient response performance and overall reliability of the LDO circuit.

Key words: voltage regulator, low-power, output overshoot, startup circuit