中国电子学会电子制造与封装技术分会会刊

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电子与封装

• 材料、器件与工艺 •    下一篇

肖特基势垒二极管失效机理驱动的可靠性提升

谢林毅1,程佳2,赵丽伟2,马书嫏2,曹冬冬3,夏显召4   

  1. 1. 润西微电子(重庆)有限公司,重庆  400060;2. 华润微电子(重庆)有限公司,重庆  400060;3. 中国汽车技术研究中心有限公司, 天津  300000;4. 中汽芯(深圳)科技有限公司,深圳  518000
  • 收稿日期:2026-05-08 修回日期:2026-07-01 出版日期:2026-07-14 发布日期:2026-07-14
  • 通讯作者: 夏显召

Reliability Enhancement of Schottky Barrier Diodes Driven by Failure Mechanisms

XIE Linyi1, CHENG Jia2, ZHAO Liwei2, MA Shulang2, CAO Dongdong3, XIA Xianzhao4   

  1. 1. Runxi Microelectronics ( Chongqing ) Co., Ltd., Chongqing 400060, China; 2. China Resources Microelectronics ( Chongqing ) Co., Ltd., Chongqing 400060, China; 3. China Automotive Technology and Research Center Co., Ltd., Tianjin 300000, China; 4. CATARC Automotive Chip (Shenzhen) Technology Co., Ltd., Shenzhen 518000, China
  • Received:2026-05-08 Revised:2026-07-01 Online:2026-07-14 Published:2026-07-14

摘要: 针对肖特基势垒二极管(SBD)的可靠性失效问题,综合运用微光显微镜(EMMI)、聚焦离子束显微镜(FIB)、扫描电子显微镜(SEM)、能谱仪(EDS)分析及直流参数测试等方法进行失效机理研究。研究揭示了其失效机制:硅(Si)颗粒在高温退火工艺中发生溶解、迁移,并在扩散阻力最小的晶界处聚集;随后在可靠性环境试验的热应力作用下,由于该区域形成的孔洞缺陷最终导致器件的失效。基于此机理,提出了通过缩短退火时间的改善方法。可靠性试验验证表明,该方法能有效抑制晶界处硅的聚集,提高芯片的可靠性。

关键词: SBD, 孔洞缺陷, 失效机理, 退火时间, 可靠性提升

Abstract: This study investigates the reliability failure of a Schottky barrier diode by employing a comprehensive set of analytical techniques, including emission microscopy, focused ion beam microscopy , scanning electron microscopy, energy-dispersive X-ray spectroscopy , and direct-current parameter testing, to elucidate the underlying failure mechanism. The findings reveal that the failure is attributed to the dissolution and migration of silicon particles during the high-temperature annealing process, which subsequently aggregate at grain boundaries where the diffusion resistance is minimal. Under the thermal stress imposed during reliability environmental testing, void defects formed in these regions ultimately lead to device failure. Based on this mechanism, an improvement method involving the reduction of annealing time is proposed. Reliability test verification demonstrates that this approach effectively suppresses the aggregation of silicon at grain boundaries and enhances the overall reliability of the devices.

Key words: SBD, void defect, failure mechanism, annealing time, reliability enhancement