[1]SUH G E,DEVADAS S.Physical Uncloneable Functions for Device Authentication and secret key Generation[C].Proc.44th Design Automation Conf.(DAC 07),ACM Press:9-14.
[2]SEDCOLEP,CHEUNGPY K.Within-die delay variability in 90nm FPGAs and beyond[C].Proc.IEEE International Conference on Field-Programmable Technology,Jun.2006:97-14.
[3]YU H,LEONG P H W,HINKELMANN H,MOLLE L,GLESNER M.Towards a unique FPGA-based identification circuit using process variations[C].International Conference on Field Programmable Logic and Applications,IEEEPress,New York,2009:397-402.
[4]MAITIA,CASARONA J,MCHALE L,SCHAUMONT P.A large scale characterization of RO-PUF[C].Proceedings of the International Workshop on Hardware-Oriented Security and Trust(Host),IEEE,New York,2010:94-99.
[5]MAITI A,SCHAUMONT P.Improved Ring Oscillator PUF:An FPGA-friendly Secure Primitive[J].Journal of Cryptology,2011,24:375-397.
[6]GUAJARDO J,KUMAR S S,SCHRIJEN G J,TUYLS P.FPGA intrinsic PUFs and their use for IP protection[C].Proceedings of the 9th International Workshop on Cryptographic Hardware and Embedded Systems,LNCS,2007,4727:63-80.
[7]LIM D,LEE JW,GASSEND B,SUH G E,SUH M,DJIK M van,DEVADASS.Extracting secret keysfrom integrated circuits[J].IEEE Trans.Very Large Scale Integr,2005,13(10):1200-1205.
[8]KUMAR S S,GUAJARDO J,RmMaes,SCHRIJEN G J,TUYLSP.The butterfly PUF:Protecting IPon every FPGA[C].International Workshop on Hardware-Oriented Security and Trust,IEEE,New York,2008:67-70. |