关键词: 有限元分析, 硅通孔, 晶圆级芯片封装, 温度循环试验

Abstract: Aiming at the wafer level chip scale packaging (WLCSP) with un-order through silicon via (TSV) structure around the periphery of the package in un-symmetric manner, a full global model and a sub-model are established by ANSYS finite element analysis software. The package and TSV structure are simulated separately under the condition of temperature cycling test (TCT) specification. The thermodynamic behavior of the WLCSP structure under temperature load is studied. It shows that the displacement of the package presentsa circular symmetrical distribution during temperature cycling test. The structure will warp outward at high temperature and bend inward at low temperature. The stress concentration occurs at the junction between the redistribution layer and the solder ball . The closer the copper gasket is to the hole in the TSV structure, the greater stress it will suffer. In the redistribution layer of the TSV structure, the stress concentrates at the corner and near the junction of passivation layer.

Key words: finite element method, TSV, wafer level chip scale packaging, temperature cycling test