中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2025, Vol. 25 ›› Issue (2): 020301 . doi: 10.16257/j.cnki.1681-1070.2025.0015

• 电路与系统 • 上一篇    下一篇

一种12位电压与电流组合型DAC设计

桂伯正,黄嵩人   

  1. 湘潭大学物理与光电工程学院,湖南 湘潭? 411105
  • 收稿日期:2024-09-19 出版日期:2025-02-27 发布日期:2025-02-27
  • 作者简介:桂伯正(2000—),男,湖南永州人,硕士研究生,主要研究方向为模拟集成电路设计。

Design of 12-bit Voltage and Current Combined DAC

GUI Bozheng, HUANG Songren   

  1. Schoolof Physics and Optoelectronic Engineering, Xiangtan University, Xiangtan411105, China
  • Received:2024-09-19 Online:2025-02-27 Published:2025-02-27

摘要: 采用40 nm CMOS工艺设计了一款12位200 kSample/s低功耗数模转换器(DAC)芯片。结合建立速度和静态性能的设计指标,设计了“7+5”分段式电压与电流组合型结构和AB类输出缓冲器,在保证建立速度的条件下考虑到电阻的失配性,实现了良好的微分非线性(DNL)和积分非线性(INL)特性。测试结果表明,在-40~125 ℃下,DNL<0.2 LSB,INL<2 LSB,DAC具有精度高、单调性好、负载能力强的特点。

关键词: 数模转换器, 微分非线性, 积分非线性, AB类输出缓冲器

Abstract: A 12-bit 200 kSample/s low-power digital-to-analog converter (DAC) chip is designed using 40 nm CMOS process. Combining the design indicators of establishment speed and static performance, a "7+5" segmented voltage-current combination structure and a class-AB output buffer are designed. ?Considering the resistance mismatch while ensuring the establishment speed, good differential nonlinearity (DNL) and integral nonlinearity (INL) characteristics are achieved. The test results show that from -40 ℃ to 125 ℃, DNL is less than 0.2 LSB and INL is less than 2 LSB. The proposed DAC has the characteristics of high accuracy, good monotonicity and strong load capability.

Key words: digital-to-analog converter, differential nonlinearity, integral nonlinearity, class-AB output buffer

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