一种部分超结型薄层SOI LIGBT器件的研究*

doi:10.16257/j.cnki.1681-1070.2022.0915

电子与封装 ›› 2022, Vol. 22 ›› Issue (9): 090403 . doi: 10.16257/j.cnki.1681-1070.2022.0915

一种部分超结型薄层SOI LIGBT器件的研究^*

周淼¹;汤亮¹;何逸涛²;陈辰³;周锌^3,4

1.中国电子科技集团公司第五十八研究所，江苏无锡 214072；2.株洲中车时代半导体有限公司，湖南株洲 412000；3.电子科技大学功率集成技术实验室，成都 610054；4. 电子科技大学广东电子信息工程研究院，广东东莞 523000

收稿日期:2022-04-22 出版日期:2022-09-22 发布日期:2022-06-15
作者简介:周淼（1987—），男，江苏无锡人，本科，工程师，先后从事光刻工艺技术、高压功率器件与工艺技术、抗辐射加固器件与工艺技术等方面的研究以及集成电路生产线技术改造工作。

Study on a Thin Layer SOI LIGBT Device with Partial Superjunction

ZHOU Miao¹, TANG Liang¹, HE Yitao², CHEN Chen³, ZHOU Xin^3,4

1. China Electronics TechnologyGroup Corporation No.58 Research Institute, Wuxi 214072,China; 2. Zhuzhou CRRC Times Semiconductor Co., Ltd., Zhuzhou412000, China; 3. Power Integration Technology Laboratory, University of Electronic Science andTechnology of China, Chengdu 610054, China; 4. Guangdong Institute of Electronicand Information Engineering of UESTC, Dongguan 523000

Received:2022-04-22 Online:2022-09-22 Published:2022-06-15

摘要/Abstract

摘要： 基于介质场增强（ENDIF）理论，提出了一种部分超结型薄硅层SOI横向绝缘栅双极型晶体管（PSJ SOI LIGBT）。分析了漂移区注入剂量和超结区域位置对器件耐压性能的影响，并在工艺流程中结合线性变掺杂技术和超结技术，使该器件实现了高垂直方向耐压和低导通电阻。测试结果表明，该器件的耐压达到816 V，比导通电阻仅为12.5 Ω?mm²。

关键词: 介质场增强, 横向绝缘栅双极型晶体管, 线性变掺杂, 超结, 击穿电压, 比导通电阻

Abstract: Based on the enhanced dielectric layer field (ENDIF) theory, a partial superjunction thin layer SOI lateral insulated gate bipolar transistor (PSJ SOI LIGBT) is proposed. The effects of drift injection dose and superjunction location on the breakdown voltage of the device have been analyzed. Combined with linear variable doping technology and superjunction technology in the process flow, the device achieves high voltage resistance and low on-resistance. The test results show that the device has a voltage resistance of 816 V and a specific on-resistance of 12.5 Ω?mm².

Key words: enhanced dielectric layer field, lateral insulatedgate bipolar transistor, linear variable doping technology, superjunction, breakdown voltage, specific on-resistance

中图分类号:

TN323+.4

周淼, 汤亮, 何逸涛, 陈辰, 周锌. 一种部分超结型薄层SOI LIGBT器件的研究^*[J]. 电子与封装, 2022, 22(9): 090403 .

ZHOU Miao, TANG Liang, HE Yitao, CHEN Chen, ZHOU Xin. Study on a Thin Layer SOI LIGBT Device with Partial Superjunction[J]. Electronics & Packaging, 2022, 22(9): 090403 .

参考文献

[1] KHO E C T, HOELKE A D, PILKINGTON S J, et al. 200-V lateral superjunction LIGBT on partial SOI[J]. IEEE Electron Device Letters, 2012, 33(9): 1291-1293.
[2] ZHU J, ZHANG L, SUN W F, et al. Further study of the U-shaped channel SOI-LIGBT with enhanced current density for high-voltage monolithic ICs[J]. IEEE Transactions on Electron Devices, 2016, 63(3): 1161-1167.
[3] TRAJKOVIC T, UDUGAMPOLA N, PATHIRANA V, et al. 800 V lateral IGBT in bulk Si for low power compact SMPS applications[C]// IEEE International Symposium on Power Semiconductor Devices and ICs, 2013: 401-404.
[4] TEEL E K C, H?LKE A, PILKINGTON S J, et al. A review of techniques used in lateral insulated gate bipolar transistor (LIGBT)[J]. IOSR Journal of Electrical and Electronics Engineering, 2012, 3(1): 35-52.
[5] TSUJIUCHI M, NITTA T, IPPOSHI T, et al. Evolution of 200 V lateral-IGBT technology[C]// IEEE International Symposium on Power Semiconductor Devices and ICs, 2014: 426-429.
[6] SUN W F, ZHU J, ZHANG L, et al. A novel silicon-on-insulator lateral insulated-gate bipolar transistor with dual trenches for three-phase single chip inverter ICs[J]. IEEE Transactions on Electron Devices, 2015, 36(7): 693-695.
[7] 张恩阳，黄勇，孟令锋，等. 基于共享Buffer的LIGBT和PLDMOS器件研究[J]. 电子与封装, 2018, 18(2): 46-48.
[8] QIAO M, LI Y F, ZHOU X, et al. A 700-V junction-isolated triple RESURF LDMOS with N-type top layer[J]. IEEE Electron Device Letters, 2014, 35(7): 774-776.
[9] LUO X R, ZHANG B, LI Z J, et al. SOI high-voltage device with step thickness sustained voltage layer[J]. Electronics Letters, 2008, 44(1): 1231-1233.
[10] SUNKAVALLI R, TAMBA A, BALIGA B J, et al. Step drift doping profile for high voltage DI lateral power devices[C]// IEEE International SOI Conference, 2002: 5248795.
[11] UDREA F, AMARATUNEA G A J. Semiconductor device and method of forming a semiconductor device. [P/OL]. (2004-03-09)[2022-04-29]. https://patents.google.com/patent/US6703684.
[12] ZHANG B, LI Z, HU S, et al. Field enhancement for dielectric layer of high-voltage devices on silicon on insulator[J]. IEEE Transactions on Electron Devices, 2009, 56(10): 2327-2334.
[13] CRABBE E F, STORK J M C, BACCARANI G, et al. The impact of non-equilibrium transport on breakdown and transit time in bipolar transistors[J]. International Electron Devices Meeting 1990 Technical Digest, 1990: 463-466.

[1]	杨晨飞,韦文生,汪子盛,丁靖扬. 嵌入分段半超结的p-栅增强型垂直GaN基HFET^*[J]. 电子与封装, 2024, 24(8): 80402-.
[2]	卓宁泽;赖信彰;于世珩. 多重场限环型终端结构的优化设计^*[J]. 电子与封装, 2023, 23(2): 20402-.
[3]	吴毅, 夏云, 刘超, 陈万军. 一种新型无电压折回现象的超结逆导型IGBT[J]. 电子与封装, 2022, 22(9): 90401-.
[4]	张尚;张墅野;何鹏. 微混装焊料组织及力学性能研究进展[J]. 电子与封装, 2021, 21(8): 80101-.
[5]	潘福跃;张明新;曹利超;刘佰清;洪根深;张海良;刘国柱. ONO反熔丝器件可编程特性研究[J]. 电子与封装, 2021, 21(7): 70404-.
[6]	乔明;袁柳. 功率集成器件及其兼容技术的发展^*[J]. 电子与封装, 2021, 21(4): 40405-.
[7]	李怡，乔明. 700 V超低比导通电阻的LDMOS器件[J]. 电子与封装, 2020, 20(8): 80401-.
[8]	敖国军，廖小平，杨兵. 磁耦数字隔离器陶瓷封装技术研究[J]. 电子与封装, 2020, 20(8): 80202-.
[9]	曹婷，姚雪霞. 一种新型的剖面化学染色技术研究[J]. 电子与封装, 2020, 20(7): 70403-.
[10]	孟培培,乔明. 一种250 V高动态阻抗恒流器件优化设计[J]. 电子与封装, 2020, 20(6): 60401-.
[11]	马阔,乔明,周锌,王卓. 高压SOI pLDMOS器件电离辐射总剂量效应研究[J]. 电子与封装, 2020, 20(6): 60403-.
[12]	肖紫嫣,刘超,夏云,陈万军. 具有三明治集电极结构的新型无电压回跳半超结RC-IGBT[J]. 电子与封装, 2020, 20(6): 60404-.
[13]	何林蓉,乔明. 基于双极载流子导电的新型恒流器件[J]. 电子与封装, 2020, 20(5): 50403-.
[14]	陈正才;黄龙;彭时秋. 5 V双向TVS器件击穿电压对称性分析与优化设计[J]. 电子与封装, 2020, 20(10): 100404-.
[15]	杨昆;乔明;何俊卿;王睿. 横向超结器件耐压与比导的优值仿真与实验验证[J]. 电子与封装, 2020, 20(10): 100401-.

中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

一种部分超结型薄层SOI LIGBT器件的研究^*

Study on a Thin Layer SOI LIGBT Device with Partial Superjunction

PDF

可视化

摘要/Abstract

引用本文

使用本文

参考文献

相关文章 15

编辑推荐

Metrics

本文评价