中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2024, Vol. 24 ›› Issue (10): 100305 . doi: 10.16257/j.cnki.1681-1070.2024.0141

• 电路与系统 • 上一篇    下一篇

一种应用于高精度ADC的可编程增益放大器的设计

王思远,梁思思,李琨,叶明远   

  1. 中国电子科技集团公司第五十八研究所,江苏 无锡 214035
  • 收稿日期:2024-04-22 出版日期:2024-10-25 发布日期:2024-10-25
  • 作者简介:王思远(1994—),男,山西运城人,硕士,工程师,主要研究方向为ADC/DAC设计。

Design of a Programmable Gain Amplifier for High Precision ADC

WANG Siyuan, LIANG Sisi, LI Kun, YE Mingyuan   

  1. ChinaElectronics Technology Group Corporation No. 58 Research Institute, Wuxi214035, China
  • Received:2024-04-22 Online:2024-10-25 Published:2024-10-25

摘要: 设计了一种应用于高精度ADC的可编程增益放大器(PGA)。整体环路采用可调节的反馈电阻来调节增益,同时适配可调节的反馈电容来稳定环路工作带宽。内部核心运放采用折叠共源共栅级加轨对轨共源级的两级全差分结构,其输入管采用PMOS管来降低噪声,同时使用输入尾电流监控和增益提高技术来提高环路的精度。仿真结果表明,该PGA对3种不同输入幅度的信号处理后,3 dB带宽稳定在13 kHz附近,信噪比均在100 dB以上,符合高精度ADC对前端信号处理的需求。

关键词: 高精度ADC, 可编程增益放大器, 低噪声

Abstract: A programmable gain amplifier (PGA) for high precision ADC is designed. The overall loop adopts an adjustable feedback resistor to adjust the gain, and adopts an adjustable feedback capacitor to stabilize the loop operating bandwidth. The internal core amplifier adopts a two-stage fully differential structure of folded common source common grid stage and rail to rail common source stage, and uses PMOS tube for input transistor to reduce noise, while the input tail current monitoring and gain-boosting technique are used to improve the accuracy of the loop. The simulation results show that after processing signals with three different input amplitudes, the PGA has a stable 3 dB bandwidth around 13 kHz, and the signal-to-noise ratio is above 100 dB, which meets the requirements of high precision ADC for front-end signal processing.?

Key words: high precision ADC, programmable gain amplifier, low noise

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