关键词: FPGA, XADC, 温度检测, 分段补偿, 预警

Abstract: Research on the temperature detection technology of on-chip Xilinx analog-to-digital converter (XADC) in field-programmable gate array (FPGA) is of great significance for improving the reliability of chip overheating protection and early warning systems. Aiming at the problems of large detection errors and delayed early warning responses in the traditional full-temperature-range linear compensation method inside FPGAs under high and low temperature environments, an adaptive segmented compensation method for high- and low-temperature environments is proposed. Default linear compensation is adopted in the temperature range from -10 ℃ to 30 ℃, while nonlinear compensation is activated when the temperature is below -10 ℃ or above 30 ℃. Temperature data during the entire compensation process is processed on the processing system (PS) side of ZYNQ-series FPGA chips, and the advantages of high processing speed and no occupation of programmable logic (PL) side resources are fully leveraged. A collaborative early warning system architecture between the PS and PL sides is constructed, which is triggered timely and effectively, thereby demonstrating the reliability and practicability of the adaptive segmented compensation method.

Key words: FPGA, XADC, temperature detection, segmented compensation, early warning