关键词: SOI MOSFET, 极低温, 器件特性, 载流子

Abstract: Research on device characteristics SOI CMOS at cryogenic temperature: Wafer-level tests were conducted on 1.5 V & 5 V SOI devices multi-feature-size structures across 5 temperature points (300 K, 250 K, 200 K, 150 K and 77 K). Experimental results indicate that as the temperature decreased from 300K to 77K, the threshold voltage and saturation current of devices gradually increased, while the leakage current progressively decreased. Combined with simulation data, the analysis of the experimental phenomena reveals that as the temperature decreases, the carriers concentration drops, causing the fermi level to shift toward the conduction or valence band. Consequently, a higher gate voltage is required to form an effective conductive channel, leading to the increase of threshold voltage. Simultaneously, the reduction of carrier concentration in the subthreshold region results in the decrease of leakage current. On the other hand, the weakened thermal vibration of the crystal lattice in the semiconductor material significantly reduces the probability of lattice scattering during carrier transport. The diminished phonon scattering increases mean free path of the carrier, thereby enhancing carrier mobility. This improvement in mobility strengthens the transport capability of carriers in the subthreshold region, leading to an increase in the saturation current.

Key words: SOI MOSFET, cryogenic temperature, device characteristics, carriers