中国电子学会电子制造与封装技术分会会刊

中国半导体行业协会封测分会会刊

无锡市集成电路学会会刊

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电子与封装

• 封装、组装与测试 •    下一篇

厚膜电路金层膜厚对键合可靠性的影响

刘颖潇,何伟乐,王晖,唐志旭,勾文哲,吴国强   

  1. 深圳市振华微电子有限公司,广东 深圳  518057
  • 收稿日期:2026-04-26 修回日期:2026-06-24 出版日期:2026-06-30 发布日期:2026-06-30
  • 通讯作者: 刘颖潇

Influence of Gold Layer Thickness on Bonding Reliability of Thick-Film Circuits

LIU Yingxiao, HE Weile, WANG Hui, TANG Zhixu, GOU Wenzhe, WU Guoqiang   

  1. Shenzhen Zhenhua Microelectronics Co., Ltd., Shenzhen 518057, China
  • Received:2026-04-26 Revised:2026-06-24 Online:2026-06-30 Published:2026-06-30

摘要: 针对厚膜混合集成电路中金丝键合因金层膜厚不当导致的可靠性问题,系统研究了氧化铝基板和介质层上不同金层厚度对金丝键合强度的影响。通过原始键合状态、100次温度循环(-65~150 ℃)和300 ℃高温贮存后的破坏性拉力测试与金球剪切测试,结合扫描电子显微镜(SEM)表面形貌分析,揭示了金层膜厚与键合界面失效模式的关联机理。结果表明在6~12 μm膜层厚度范围内,基板上键合强度随膜厚增加单调上升,介质上键合强度呈先升后降趋势。薄金层因表面孔洞率高、界面结合力弱,键合后存在隐性可靠性风险。当金层厚度增加后,金层致密性显著改善,键合界面完整性提高。综合确定了厚膜金导体键合的最优厚度工艺窗口,为厚膜混合集成电路的工艺优化提供了实验依据。

关键词: 厚膜混合集成电路, 金层膜厚, 键合强度, 工艺优化, 可靠性

Abstract: In view of the reliability issues of gold wire bonding in thick-film hybrid integrated circuits caused by improper gold layer thickness, this paper systematically investigates the effects of different gold layer thicknesses on gold wire bonding strength on Al2O3 and dielectric layers. Through destructive tensile tests and gold ball shear tests under the initial bonding state, after 100 temperature cycles (-65-150 ℃), and after high-temperature storage at 300 ℃, combined with surface morphology analysis via scanning electron microscopy (SEM), the correlation mechanism between gold layer thickness and bonding interface failure modes is revealed. The results show that within the thickness range of 6-12 μm, the bonding strength on the Al2O3 substrate increases monotonously with the rise of gold layer thickness, while the bonding strength on the new dielectric layer presents a trend of first increasing and then decreasing. Thin gold layers feature high surface porosity and weak interfacial bonding force, leading to potential hidden reliability risks after bonding. With the increase of gold layer thickness, the compactness of the gold layer is greatly improved, and the integrity of the bonding interface is enhanced. The optimal thickness process window of thick-film gold conductors for bonding application is comprehensively determined, which provides an experimental basis for the process optimization of thick-film hybrid integrated circuits.

Key words: HIC, gold layer thickness, bonding strength, process optimization, reliability