中国半导体行业协会封装分会会刊

中国电子学会电子制造与封装技术分会会刊

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电子与封装 ›› 2025, Vol. 25 ›› Issue (3): 030112 . doi: 10.16257/j.cnki.1681-1070.2025.0104

所属专题: 第三代半导体功率电子封装技术

• “第三代半导体功率电子封装技术”专题 • 上一篇    下一篇

GaN芯片封装技术研究进展与趋势*

宋海涛1,2,王霄1,2,龚平3,朱霞1,2,李杨1,2,刘璋成1,2,闫大为1,2,陈治伟1,2,尤杰1,2,敖金平1,2   

  1. 1. 江南大学集成电路学院江苏省智能传感器与专用集成电路工程研究中心,江苏 无锡 ?214122;2. 江南大学集成电路学院物联网技术应用教育部工程研究中心,江苏 无锡 ?214122;3. 无锡华润安盛科技有限公司,江苏 无锡 ?214111
  • 收稿日期:2025-01-24 出版日期:2025-03-28 发布日期:2025-03-28
  • 作者简介:宋海涛(2002—),男,江苏盐城人,硕士研究生,主要研究方向为面向CMOS应用的GaN器件。

Research Progress and Trend of GaN Chip Packaging Technology

SONG Haitao1,2, WANG Xiao1,2, GONG Ping3, ZHU Xia1,2, LI Yang1,2, LIU Zhangcheng1,2, YAN Dawei1,2, CHEN Zhiwei1,2, YOU Jie1,2, AO Jinping1,2   

  1. 1.?Engineering Research Center for IntelligentSensors and Application-Specific Integrated Circuits JiangsuProvince, School of Integrated Circuits, Jiangnan University, Wuxi 214122, China; 2. Engineering Research Center of IoTTechnology Applications Ministry of Education, School ofIntegrated Circuits, Jiangnan University, Wuxi 214122,China; 3. Wuxi China Resources Micro-AssemblyTechnology Co., Ltd., Wuxi 214111, China
  • Received:2025-01-24 Online:2025-03-28 Published:2025-03-28

摘要: 作为第三代半导体材料,GaN因其高电子迁移率、高击穿场强等优异特性,正被广泛应用于高频、高功率电子器件。然而,其封装技术面临诸如热管理、电气性能优化以及封装可靠性等挑战,同时还需要满足更紧凑、更集成的需求。重点讨论了目前GaN芯片封装的多种解决方案,包括晶体管外形(TO)封装、四边扁平无引线(QFN)封装等分立器件封装结构,晶圆级封装(WLP)、多芯片模块(MCM)合封器件封装结构以及诸多先进封装技术。分析了封装技术的发展趋势,如集成化、模块化封装,以及面向高频、高功率应用的优化方法。随着技术的不断突破,GaN封装有望在更高效、更可靠的方向上取得进一步进展,以满足不断增长的市场需求。

关键词: GaN, 芯片封装, 先进封装, 散热, 寄生电感, 3D集成

Abstract: As a third-generation semiconductor material, GaN is widely used in high-frequency and high-power electronic devices because of its excellent characteristics such as high electron mobility and high breakdown field strength. However, its packaging technology faces challenges such as thermal management, electrical performance optimization, and packaging reliability, as well as the need to be more compact and integrated. Various solutions for GaN chip packaging are discussed, including discrete device packaging structures of transistor outline (TO) packaging and quad-flat no-lead (QFN) packaging, closed device packaging structures of wafer-level packaging (WLP) and multi-chip module (MCM), and many advanced packaging technologies. The development trend of packaging technology is analyzed, such as integration, modular packaging, and optimization methods for high-frequency and high-power applications. With the continuous breakthrough of technology, GaN packaging is expected to make further progress in the direction of more efficient and more reliable to meet the growing market demand.

Key words: GaN, chip packaging, advanced packaging, heat dissipation, parasitic inductance, 3D integration

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