关键词: FPGA, VerilogHDL, CAN_FD总线协议

Abstract: As the core communication technology of the new generation automobile bus network, CAN_FD bus protocol has shown remarkable advantages in improving transmission rate and extending data field length. However, the existing CAN_FD controller generally adopts closed IP core, and the protocol stack is invisible, which seriously restricts the autonomous controllability of the network system. To solve this problem, a design scheme of CAN_FD controller based on FPGA implementation is proposed. The design is compatible with CAN standard, and the cyclic redundancy check algorithms of CRC17 and CRC21 are added, which adds double insurance for the accuracy of data transmission. The designed CAN_FD controller has less resource consumption and lower power consumption than the existing CAN_FD closed IP controller. The simulation results show that CAN_FD bus protocol communication can be carried out between host computer and FPGA normally. The design can realize custom adjustment, has high flexibility, can achieve the expected effect, and has practical value.

Key words: FPGA, Verilog HDL, CAN_FD bus protocol